TABLE OF CONTENTS This chapter discusses how completed die are packaged for use. The chapter describes the trade-offs of different types of packages and presents an example package assembly flow.
Upon completion of this chapter the reader will be able to:
Visualize how multiple levels of packaging are used in an electronic system.
Describe common package lead configurations.
Compare and contrast wire-bond and flip-chip packages.
Describe different types of package substrates.
Be aware of the trade-offs of important package design choices.
Understand thermal resistance and the factors that affect it.
Describe the trade-offs of using a multichip package.
Explain a typical package assembly process.
The microscopic size of the features in integrated circuits makes a single chip the size of a thumbnail capable of enormous computational performance. This tiny size also means the same chip is damaged very easily. Most chips would be thoroughly ruined by simply picking them up. Any surface structure would be obliterated and even if coated in insulation, the salts common on everyone's skin could quickly contaminate the circuitry. This was true for even the earliest microprocessors, so all processors require some type of packaging.
The package first and foremost provides the chip protection from physical damage and chemical contamination. The package must do this while still providing electrical connections (leads) from the outside world to the chip. The interconnections on printed circuit boards (PCBs) are far larger than semiconductor chips, and the package must bridge this gap in scale. The package leads connect to...
