Designing a processor microarchitecture involves trade-offs of IPC, frequency, die area, and design complexity. Microarchitectural design must balance these choices based on the target market. There are many complicated algorithms that could be implemented in hardware to add performance but are not used because of the design time and die area they would take to implement. Each square millimeter of die area required by a microarchitectural feature will either add to the overall cost or take area away from some other feature. A larger branch target buffer may mean a smaller trace cache. The design team must find the features that provide the greatest performance improvement per area for the programs that are most important for their product. Some of the most important design choices will include:

• Pipeline length

• Instruction issue width

• Methods to resolve control dependencies

• Methods to resolve data dependencies

• Memory hierarchy

These and other microarchitectural choices will define most of the high-level details of the design. The following chapters will focus on the job of implementing the design.