Upon completion of this chapter, the reader will be able to:

1. Explain how a processor pipeline improves performance.

2. Describe the causes of pipeline breaks.

3. Explain how branch prediction, register renaming, out-of-order execution, and HyperThreading improve performance.

4. Be aware of the limitations of different measures of processor performance.

5. Understand the impacts of pipeline depth on processor performance.

6. Describe the causes of cache misses and how different cache parameters affect them.

7. Explain the need for cache coherency and understand its basic operation.

8. Understand the difference between macroinstructions and microinstructions.

9. Be familiar with the pipeline of the Pentium 4 processor.