TABLE OF CONTENTS To foster understanding, this chapter refers to digital compensation on the basis of the example presented in figure 17, unless otherwise specified. The circuit is the same as in figure 10.
The sign of the offset voltage V O of the amplifier A is detected using a comparator connected to its output. The amplifier has an extra analog offset nulling input Z, which is considered positive [1] by convention. It can be a voltage, a current, or another physical quantity, but remains here without unit to keep the presentation as general as possible.
The feedback loop between the output of the comparator and the correction input is the digital compensation circuit. The digital information available at the output of the comparator, namely the sign of the offset, is sufficient [2] to allow complete offset cancellation. If the offset is positive, the correction circuit decreases it by diminishing the Z input value. Conversely, if the sign is negative, Z is increased.
On this basis, it is possible to design a compensation circuit consisting of an adapted algorithm realizing the function described above and a digital-to-analog converter driving the compensation input. This chapter analyses these blocks and presents the simplifications and optimizations that can be made.
[1]i.e. increasing the input value Z increases the offset voltage V O.
[2]because the relation between Z and V O is a strictly monotonic function.
