TABLE OF CONTENTS This chapter presents the implementation of the current measurement Hall microsystem with continuous digital gain calibration described in chapter 5. The issues and solutions at block-level are detailed and discussed on the basis of simulation and measurement results. System-level imperfections are also presented, and compensation techniques proposed. The complete ASIC is then described. Its features and measurement results are discussed. Finally, future development possibilities are proposed.
A prototype of the Hall microsystem presented in chapter 5 (figure 126) [91] [92] has been realized in a conventional 0.8 ?m 5V CMOS technology. It has voluntarily been designed for test and validation purposes [96]. To this end, the circuit allows maximum test and configuration possibilities, and on some design parameters the flexibility is favoured at the cost of pure performance. The circuit is also kept as modular and simple as possible to allow easy identification of problems and limitations.
This chapter presents the implementation issues at block- and systemlevel, and details the digital compensation techniques that can be used to correct the imperfections. Both chopper- and autozero-like techniques (chapter 2) are implemented. This current measurement ASIC is a typical application for the digital compensation methodology of chapter 4 and the associated correction circuits (chapter 3).
[96]L. S. Milor, "A Tutorial Introduction to Research on Analog and Mixed-Signal Circuit Testing", IEEE Transactions on Circuits and Systems, Part II: Analog and Digital Signal Processing, Vol. 45, pp. 1389 1407, October 1998
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