TABLE OF CONTENTS Using the properties presented in section 8, one can design an R/2R ladder using MOS pseudo-resistors instead of resistors. This network is named M/ 2M.
Figure 36 presents a 4 bits M/2M ladder.
This M/2M ladder corresponds exactly to the R/2R network of figure 29. Each transistor acts as a single pseudo-resistor having a value equivalent to R, except the bottom-most transistors which act either as an open switch or also as R. In this way, it is possible to save one extra transistor since the switches are integrated in the pseudo R/2R ladder.
To make each transistor behave as a pseudo-resistor R, the rules presented in section 8 are applied. All the transistors in the ladder have the same dimensions W and L, and their gate voltage is equal to V G. For the bottom-most transistors, the gate voltage has two possible values: If the switch has to be open, a gate voltage ensuring the blocking of the transistor is applied. When the switch is closed, it has to act as a pseudo-resistor with the same value as the other transistors in the ladder because the voltage V G is applied to the gate.
If one chooses V G = VDD, it is possible to use directly logic levels to drive the gates of the switch transistors. A high logic level (gate voltage equal to VDD) makes the corresponding transistor act as a pseudo-resistor, whereas a low...
