TABLE OF CONTENTS Chapter 3 presents the successive approximations algorithm, as well as the M/2 + M sub-binary converters which are recommended to be used in conjunction. In this chapter, a complete methodology using these current-mode digital correction circuits for improving the performance of analog systems is presented. The explanation is based on the example of the offset compensation of an operational amplifier. Another example, the calibration of a SOI 1T DRAM current reference, is presented at the end of the chapter.
The successive approximations algorithm, combined with a current-mode digital-to-analog converter like a M/2 +M for instance, allows to compensate a large variety of analog circuit imperfections. This chapter presents a complete methodology based on such digital correction circuits which inject a compensation current. It ranges from the choice of the most adapted compensation to the verification of its efficiency using adapted simulation tools. The example of the offset correction of an operational amplifier is used throughout the chapter for simplicity and coherence reasons. The application of the methodology to another circuit, the SOI 1T DRAM current reference, is also presented.
This section presents the operational amplifier example, which is used in this chapter for demonstration purposes. The two-stage Miller topology is chosen for its simplicity. Because this structure is well-known, the focus is set on the compensation methodology rather than on the amplifier characteristics and design constraints. But this topology is used for demonstration reasons only. In practice, other more efficient structures...
