Methodology for the Digital Calibration of Analog Circuits and Systems: With Case Studies

11: M/2+M LADDERS

11 M/2 +M LADDERS

Using the same technique as for M/2M ladders, some R/xR ladders can easily be realized using pseudo-resistors. Two particularly interesting variants of M/2 +M (sub-binary) ladders are the M/3M and M/2.5M ladders. They are presented in this section.

11.1 M/3M Ladders

The M/3M is the implementation of the R/3R structure using MOS transistors to realize pseudo-resistors of unit value R. Figure 44 presents an M/3M ladder.


Figure 44: M/3M ladder

In each stage, the horizontal R resistor is replaced by a single transistor, and the vertical 3R resistor is replaced by 3 transistors in series. The bottommost resistor is duplicated to also implement the switch, exactly as in the M/ 2M ladder (see section 9.1).

For the terminator, an equivalent 2R pseudo-resistor is used. This choice is done to simplify the implementation. In fact, the minimum and maximum values for x T are calculated using equation 3.70 ( ? calculated with equation 3.66). They are approximately equal to 1.95 and 2.30, respectively. The ideal value of 2.30 is rather difficult to realize using unity pseudo-resistors. On the other hand, the integer value 2, which lies in the acceptable interval, can be realized using only 2 transistors. The slight drawback is that the radix of the first stages of the ladder is in this case sub-optimal.

Table 5 presents the main characteristics of the M/3M (and R/3R) ladder. The equations used to calculate the values of the parameters are mentioned. 63

Table 5:

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