TABLE OF CONTENTS As already discussed in section 3.2, using a binary-radix DAC with a successive approximations algorithm exploits the limit of the working condition. Furthermore, such DACs are difficult to design unless the number of bits is small, because the weight of each bit needs to be precisely set to avoid missing codes and redundancies. For this reason, they usually occupy an important circuit area.
The working condition (equation 3.5) of the successive approximations algorithm does not impose precise bit weights. Whereas missing codes are not allowed, redundancies are not problematic. This can be turned into an advantage, because it allows the use of imprecise converters. By voluntarily introducing redundancies, the risk of missing codes is reduced and the subbinary converters can be designed using less effort and area without degrading the performance of the algorithm.
Sub-binary converters should systematically be used with successive approximations algorithms. There is no reason for preferring a conventional radix-2 converter.
In a sub-binary radix DAC, the weights of the different bits are based on a radix R that is smaller than 2:
Figures 24 and 25 show the input/output characteristics of sub-binary radix DACs with R equal to 1.75 and 1.5 respectively. In both figures, the grey line is the identity function y = x. See also figure 18 for the R = 2 case.
When the radix is decreased, the characteristics...
