Properties of Crystalline Silicon

Chapter 15: Gettering

(Edited by E.R. Weber)

15.1 Gettering of Transition Metals in c-Si: Gettering in Silicon Technology

H. Hieslmair, S. A. McHugo, A.A. Istratov and E.R. Weber
June 1998

A METAL IMPURITY EFFECTS ON DEVICES

It is well established that contamination of silicon wafers with transition metals can reduce device yield even if the concentration of metals is below 10 12 cm -3. When dissolved in silicon, transition metals can form deep levels [1] which increase p-n junction leakage currents by generation [2 4] of carriers in reverse biased depletion regions (or by recombination in small forward biases) [5 7]. Furthermore, metal impurities in p-n junctions can lower the reverse bias breakdown voltage [8]. Metal precipitates can also form bands of deep levels [9,10], which greatly increase leakage currents and can even directly short p-n junctions [11 13]. In bipolar junction transistors, dissolved metals generally increase the base currents, power consumption and heat production, and degrade the emitter efficiency and base transport factors [2]. MOS devices are sensitive to metal contamination [14] since many transition metals precipitate at the Si/SiO 2 interface or become trapped in the oxide layer [15,16]. The resulting reduction of the dielectric strength of the oxide layer leads to oxide breakdown device failures [5,17 27] and/or an increase in generation rates [28], often referred to as a decrease in gate oxide integrity (GOI). Furthermore, transition metals have been linked to poor retention times (high refresh rates) in DRAMs [29] and pixel failures [3,4,18] in CCD devices. CCD devices can...

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