350 Solved Electrical Engineering Problems: For the FE/PE Exams in Electrical Engineering

2.6: MOSFET enhancement mode

2.6 MOSFET enhancement mode

The N-channel enhancement mode MOSFET circuit shown in Figure 2.6 uses a drain-to-gate feedback bias. Determine the values of (a) V GS and (b) V DS for a quiescent drain current, I DS, of 1 ma.


Figure 2.6: MOSFET enhancement mode

Solution:

  1. V DS = V DD ? I DSR D = 20 ? 1 10 ?3(5 10 3) = 15 volts


UNLIMITED FREE
ACCESS
TO THE WORLD'S BEST IDEAS

SUBMIT
Already a GlobalSpec user? Log in.

This is embarrasing...

An error occurred while processing the form. Please try again in a few minutes.

Customize Your GlobalSpec Experience

Category: Metal-Oxide Semiconductor FET (MOSFET)
Finish!
Privacy Policy

This is embarrasing...

An error occurred while processing the form. Please try again in a few minutes.