CMOS Current-Mode Circuits for Data Communications

6.2: Clock and Data Recovery Using Phase-Picking

6.2 Clock and Data Recovery Using Phase-Picking

As implied by the name of this approach, the received data are sampled multiple times per data. eye. Timing information or eloek is recovered by allocating the transition edge of the incoming data. This is achieved by examining the value of adjacent samples of the incoming data. Once the two edges of the data eye are identified, the sample closest to the center of the data eye is selected as the recovered data. Fig. 6.4 shows the block diagram of phase-picking clock and data recovery using 3x-oversampling.


Figure 6.4: Clock and data recovery using phase-picking. Each data eye is sampled three times.

The main advantages of the phase-picking approach include high speed and the ease of implementation because the clock and data recovery process is an open-loop operation with no feedback. There are, however, a number of challenges and limitations in the implementation of phasepicking clock and data recovery.

  • Depending upon the oversampling ratio, a bank of high-speed samplers that are connected in parallel are required. Although the period of the clock signals driving these samplers can be made low, the sampling window of each sampler, denoted by ? s, is given by

    (6.3)

    where N is the number of samples per data eye, and is small. This requires that not only the rising and falling edges of the sampling clocks be sharp with little timing jitter, the setup-hold time of the samplers must also be very small.

  • The capacitance...

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