TABLE OF CONTENTS Various design aspects of serial-link data receivers have been investigated in detail. We have shown that current-mode preamplifiers offer the attractive advantages of a low input impedance, a large bandwidth, and low supply voltage requirement. Clock and data recovery can be achieved using phase-picking, phase-tracking, and integration. Phase-picking is an open-loop approach. Although the implementation of the phase-picking schemes is straightforward, the need for complex logic to perform phase-picking, data-picking, a large number of samplers, especially when the over-sampling ratio is large, significantly increases the level of power consumption and silicon area. The blind-sampling nature of phase-picking also limits its robustness in combating process and environment variations.
As compared with the phase-picking approaches, phase-tracking measures the phase difference between the incoming data and a local sampling clock and purposely places the sampling point at the optimal sampling point, i. e. the center of data eyes, once the edges of the data eyes are allocated, to maximize the timing margins, subsequently BER. Phase-tracking is a closed-loop approach and is more robust in tolerating process and environment variations. It requires that the loop must have a large loop bandwidth or equivalently a fast transient response, so that the phase-tracking and data sampling processes can be completed within the symbol time. The suppression of the noise from the incoming data stream, however, requires that the loop bandwidth be as small as possible so that the systems can filter out any unwanted high-frequency noise from the input. Advanced phase / delay-locked loops,...
