TABLE OF CONTENTS This appendix provides a brief overview of the Advanced Boolean Equation Language (ABEL) which is an industry-standard Hardware Description Language (HDL) used in Programmable Logic Devices (PLDs).
The Advanced Boolean Equation Language (ABEL) is an easy-to-understand and use programming language that allows the user to describe the function of logic circuits. It is now an industry-standard allows you to enter behavior-like descriptions of a logic circuit Developed by Data I/O Corporation for Programmable Logic Devices (PLDs), ABEL is now an industry-standard Hardware Description Language (HDL). An example of how ABEL is used, was given in an example in Chapter 11. There are other hardware description languages such as the VHSIC [*] Hardware Description Language (VHDL) and Verilog. ABEL is a simpler language than VHDL and Verilog. ABEL can be used to describe the behavior of a system in a variety of forms, including logic equations, truth tables, and state diagrams using C-like statements. The ABEL compiler allows designs to be simulated and implemented into PLDs such as PALs, CPLDs and FPGAs.
We will not discuss ABEL in detail. We will present a brief overview of some of the features and syntax of ABEL For more advanced features, the reader may refer to an ABEL manual or the Xilinx on-line documentation.
[*] VHSIC is an acronym for Very High Speed Integrated Circuits.
An ABEL source file consists of the following elements:
Header: including Module, Options,...
