TABLE OF CONTENTS This appendix provides a brief overview of the VHSIC Hardware Description Language briefly referred to as VHDL. This language was developed to be used for documentation, verification, and synthesis of large digital designs.
The VHSIC [*] Hardware Description Language, henceforth referred to as VHDL, is a powerful programming language used to describe hardware designs much the same way we use schematics. It was developed by the Institute of Electrical and Electronics Engineers (IEEE) as Standard VHDL1076. It was introduced in 1987 as Std 1076 1987, and was upgraded in 1993 as Std 1076 1993. Its popularity stems from the fact that it can be used for documentation, verification, and synthesis of large digital designs.
[*] VHSIC is an acronym for Very High Speed Integrated Circuit
Consider a combinational digital circuit such as a full adder. Such a circuit is often referred to as a module, and it is described in terms of its inputs and outputs. For instance, the full adder module has three inputs and two outputs. In VHDL terminology, the module is referred to as a design entity, or simply design, and the inputs and outputs are called ports. A typical design consists of two or more blocks. Thus, the blocks in a full adder are gates and inverters. In other words, blocks are connected together to form a design.
In VHDL it is not necessary to provide a description of the function performed by a block,...
