TABLE OF CONTENTS Alternative material systems for lead-free solders1 71 are currently of intense interest in the electronics industry. This is initiated in part by the Waste Electrical and Electronic Equipment/Reduction of Hazardous Substances (WEEE/ROHS) directives and subsequently driven by Japanese electronics retailers and manufacturers in an attempt to increase European market share in advance of final legislation. In this chapter, chip- (wafer-) level interconnects with lead-free solders are discussed.
Wafer bumping is the most important step in using solder-bumped flip chip technologies. The bump sizes60 may vary from 50 ?m (for the conventional solder-bumped flip chip technology) to as large as 500 ?m [for the wafer-level redistribution solder-bumped chip-scale package (CSP)]. There are many different ways to put solder bumps on the wafer/die as reported in Ref. 60. If one accounts for cost, surface-mount technology (SMT) experience, material availability, and processing flexibility, microball mounting and paste printing are the two best methods to bump lead-free solders on the wafer/die. The only limitation is the pad pitch of the chip, which is 125 ?m in mass production today.
Under-bump metallurgy (UBM) is the heart of solder wafer bumping.60 If it is not properly made, then (1) during or right after reflowing the solder-bumped chip on the printed circuit board (PCB)/substrate, the chip may fall off, and (2) the solder joint quality may not be adequate after multiple reflows. In this chapter, the electroless Ni-P (phosphorus)-immersion Au, Al-NiV-Cu, and the Ti-Cu or TiW-Cu UBMs will be considered.
As...
