TABLE OF CONTENTS Planes with dielectric layer separation, also called the power-bus, serve several purposes in PDNs: they carry dc current from source to load, they connect bypass capacitors horizontally to active devices, and many times they also provide a return path for signals. The nature and depth of modeling and characterization depends on our interests and (ultimate) goals. If we are worried about the dc voltage drop on a high-current but otherwise well-filtered supply rail, our main focus may be limited to the equivalent dc resistance and voltage-drop profile. For lower current multi-GBIO rails the dc voltage drop may matter less, but we may need to characterize and model the high-frequency return-path function of the plane over a wide frequency band. If our task is to characterize the material properties of the conductive planes and dielectric laminates, we may not care much for the practical limitations of connecting geometry in the real usage, but we might want to model and capture the pure material properties as accurately as possible. Finally, if our focus is electromagnetic compatibility, we probably need to characterize primarily the high-frequency resonance peaks.
There are several commercial tools available to simulate PDN planes (see Chapter 2). Tools which use the finite difference time domain (FDTD) method (see, e.g., [1]) solve for the structure's response in the time domain, and obtain the frequency domain response by translating the result with fast Fourier transform. FDTD solutions are known to have time-efficient execution for large problems, but the translation to...
