TABLE OF CONTENTS Up until now, the loop being analyzed has been assumed to be locked, and any changes to the condition of the loop have caused a small change in phase error. Of course, we seek to ensure that the loop operates this way. Consequently, we must know under what conditions the loop will not lock and under what conditions the loop will lose lock. Furthermore, we must understand how phase lock is achieved in order to decide if an additional support circuit is required and how this supporting circuit will help achieve lock.
This section discuses several key acquisition characteristics for a PLL. It shows the nonlinear equations that characterize the loop's time-domain response outside the range of the phase detector. Next, the time-domain response outside the range of the phase detector depends on initial phase and frequency conditions. We will discuss lock-in range, pull-in range, and hold-in range. Finally, we will study the derivation of the second-order, nonlinear, ordinary differential equation for a PLL. This will allow us to know clearly the approximations that are made to solve the equation and when these approximations are violated.
A loop normally starts in an unlocked state. The loop's own actions or a support circuit must bring the loop to the locked state. The process of bringing a loop into lock is called acquisition, which is the topic that we are going to discuss. The loop achieves self-acquisition by acquiring lock by itself. The loop achieves aided-acquisition
