Overview

This chapter discusses test and measurements of PLLs. Measurements of PLLs are critical in verifying the performance of the PLL against its designed performance. Many of the tests can only be done on the bench because the length of the test time (greater than tens of milliseconds) makes it impractical to test on the tester in production. Understanding how a PLL is tested can help the designer incorporate testing aids into the PLL.

Initial measurements of a PLL are very important because measurements of an unlocked loop or a very noisy loop give erroneous data and may stop any further measurements. Consequently, measurements of hold-in range and spurious signals are presented to give some minimal stability and accurate noise information. Next, reference frequency-step-response measurements are discussed to verify damping and bandwidth design goals. The PLL bandwidth can also be accurately measured with a network analyzer. Several phase-noise measurements are presented. An explanation of the advantages and disadvantages of each method are presented. Jitter and spurious-signal measurements are also discussed. Understanding these frequency and time-domain issues will help in designing lower-noise loops.

In many applications, PLLs are embedded in systems on a chip. Loop performance depends on the floor planning done on these chips. A less sensitive PLL helps ease floor planning constraints. Consequently, measurements of coupled signals into the PLL are presented. Noise-injection tests on the reference clock and power supply are made to measure the performance of PLLs under low signal-to-noise conditions.

In monolithic PLLs, power is often...