Phase-Locked Loop Engineering Handbook for Integrated Circuits

3.7: Summary

3.7 Summary

In summary, this chapter discussed system requirements for a PLL. Noise basics, phase noise, time-domain response, acquisition, jitter, and spurious signals were the system requirements that were studied in detail. Noise basics were discussed and mathematical relationships were developed in order to lay a foundation for analyzing noise requirements and understanding the relationship to circuit design. Next, phase-noise relationships in oscillators were discussed and mathematical relationships were developed to give a background for analyzing noise and jitter in oscillators. Linear time-domain responses were studied to provide an understanding of the relationship between loop variables, faster switching time, and tracking error. These studies showed that damping factor and natural frequency can be determined from measured or simulated step responses.

Next, nonlinear acquisition was studied. Mathematical relationships were developed that explain loop responses that seem to be inconsistent. Next, the causes of jitter, the effect of jitter on the PLL, the relationship of phase noise to jitter, and the relationship of spurious signals to jitter were covered. Then, the relationships of PLL parameters to jitter were studied. Mathematical relationships were developed to understand how to improve timing margin in digital circuits and improve the bit-error rate of synchronizing circuits. Finally, spurious signals were studied. Mathematical relationships were developed that showed how these signals cause jitter and reduce the precision of the output frequency. Spurious signals at the output from the reference frequency is one of the largest spurious signals in a loop. Mathematical models and design techniques were developed to...

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