Overview

This chapter begins to discuss the design of the individual components in a PLL. In this chapter, frequency generators are covered. Detailed designs of programmable dividers, VCOs, and crystal oscillators are studied. Design techniques of programmable dividers are discussed to prevent a PLL from hanging up on one of the power rails. Programmable dividers, pulse-swallowing counters, and fractional dividers are the types of dividers that are covered.

System-on-a-chip integration has made PLL noise immunity to supply variations extremely important because digital circuits add noise to the supply and substrate. VCO performance accounts for this noise immunity to supply variations. It also accounts for more of the other PLL characteristics than any other component in a PLL. The major output characteristics of the sensitivity of the PLL to injected noise on the supply, the time jitter of the output, the phase noise, the frequency tuning range width, non-harmonically related spurious modes, loop stability, linear modulation, linear demodulation, and output that toggles in unlocked conditions depend on the characteristics of the VCO. For these reasons, design trade-offs and techniques for a wide variety of VCOs are studied.

Single-ended ring, differential ring, multivibrator, and LC-resonant VCOs are covered. The single-ended ring is analyzed because of its simplicity and popularity. A multivibrator is analyzed because of its wide and high frequency range, because it is current controlled instead of voltage controlled, and because it easily absorbs parasitic capacitances. A negative-resistance LC resonant oscillator will be analyzed to show that a feedback path can...