Power Distribution Networks with On-Chip Decoupling Capacitors

Tradeoffs among inductance, area, and resistance of power distribution grids are investigated in this chapter. As discussed in Section 1.3, design objectives, such as low impedance (low inductance and resistance), small area, and low current densities (for improved reliability), are typically in conflict. It is therefore important to make a balanced compromise among these design goals based upon application-specific constraints. A quantitative model of the inductance/area/resistance tradeoff in high performance power distribution networks is therefore necessary to achieve an efficient power distribution network. Another important goal is to provide quantitative guidelines to these tradeoffs and to bring intuition to the design of high performance power distribution networks.
Two tradeoff scenarios are considered in this chapter. The inductance versus resistance tradeoff under a constant grid area constraint in high performance power distribution grids is analyzed in Section 11.1. The inductance versus area tradeoff under a constant grid resistance constraint is analyzed in Section 11.2. The chapter concludes with a summary.
In the first tradeoff scenario, the fraction of the metal layer area dedicated to the power grid, called the grid area ratio and denoted as A, is assumed fixed, as shown in Fig. 11.1. The objective is to explore the tradeoff between grid inductance and resistance under the constraint of a constant area [276]. The area dedicated to the grid includes both the line width W and the minimum spacing S 0 necessary to isolate the power...