Power Distribution Networks with On-Chip Decoupling Capacitors

List of Figures

Chapter 1: Introduction

Fig. 1.1: Microphotographs of the first integrated circuit (IC) and first monolithic IC along with a high performance, high complexity IC (the die size is not to scale). (a) The first IC (Texas Instruments, 1958), (b) the first monolithic IC (Fairchild Semiconductor, 1959), and (c) the high performance dual core Montecito microprocessor (Intel Corporation, 2005)
Fig. 1.2: Evolution of transistor count of CPU/microprocessor and memory ICs. In the lower left corner the original Moore's data [8] is displayed followed by the extrapolated prediction (dashed line)
Fig. 1.3: Evolution of microprocessor clock frequency. Several lines of microprocessors are shown in shades of gray
Fig. 1.4: Evolution of design criteria in CMOS integrated circuits
Fig. 1.5: Microphotograph of the 4004 the first microprocessor implemented on a monolithic die
Fig. 1.6: Evolution of microprocessor power consumption. Several lines of microprocessors are shown in shades of gray
Fig. 1.7: Power delivery system consisting of the power supply, power load, and non-ideal interconnect lines
Fig. 1.8: Evolution of the average current in high performance microprocessors. Several lines of microprocessors are shown in shades of gray
Fig. 1.9: Increase in power current requirements of high performance microprocessors with technology scaling, according to the ITRS roadmap [10]. The average current is the ratio of the circuit power to the supply voltage. The transient current is the product of the average current and the on-chip clock rate, 2 ? f clk
Fig. 1.10: Reduction in noise margins of CMOS circuits with technology scaling. NM

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