Radar Systems for Technicians
Combining historical insight and technical information, this text takes the reader as far back as original World War II concepts to illustrate the logical reasoning behind state-of-the-art radar designs.
TABLE OF CONTENTS Radar Systems for Technicians
Chapter 13: An Mti Processor
Introduction
Mti theory was explained, in detail, in the preceding chapter. For practical application, the technician needs an exposure to an actual system. All systems bear great resemblances to each other, and a good knowledge of one makes all others understandable. The largest deployment of latter-day FAA canceler-type mti systems was the ASR-8, and that system will be used as a basis for the sample system to be described in this chapter. This sample system will differ somewhat from the ASR-8, in that auxiliary, or accessory, circuits, not essential to the processing of the target data, have been omitted.
Timing
Radar synchronizers have been addressed in preceding chapters. Figure 13 1 is an abbreviated block diagram of part of the processor, and the associated timing circuitry. The system to be described here is a digital type, employing a synthesis transmitter. The basic timing source is a 30-MHz coho, and the range-cell rate is 1/14 the coho, which is 2.143 MHz; this creates range cells of 0.467 ?secs, 0.0378 radar nautical miles, 230 radar feet. Within each range cell, 133.3 nanosecs is used to sample the bipolar video in the analog-to-digital converters, hereafter called, quantizers. There will be 1665 range cells in each T r; the number is dictated by the size of storage-shift-register integrated-circuit packages; the odd number arises from the 1665th stage, a final register in the canceler. The 1665 range cells, times 0.467 ?secs, provides 777 ?secs of processing time, allowing 741.3 secs...
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