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Digital Signal Processors (DSP) - Embedded - DSP (Digital Signal Processors) -- ADSP-TS101SAB1-100-NDSupplier: Digi-Key Electronics
Description: IC DSP CTRLR 128BIT BUS 625BGA
- Data Bus: 128-Bit
- Supply Voltage: 1.2 V, 3.3 V
- Package Type: Other
- Pin Count: 625
Supplier: Acromag, Inc.
Description: such as communication, Defense/Aerospace, Industrial controls, DSP, FPGA, etc. The XPMC-6710 elite grade Compute engine gives OEMs blazing Compute density to do leading edge pervasive computing. The PPC7448 includes 128-bit AltiVec vector execution unit as found in previous PC74xx devices, but with the enhanced
- Technology: PMC
- Product Type: Serial Communication Module
- PMC Data Bus: 32-bit, 64-bit
- Number of Ports: 8
Supplier: RS Components, Ltd.
Description: Family Name:Virtex-4; Device Logic Cells:56880; Device Logic Units:56880; Dedicated DSP:128; Number of Multipliers:128 (18x18); RAM Bits:4276224; Processor Blocks:2; Supplier Package:FCBGA; Pin Count:1152; Device Number of DLLs/PLLs:12
- Logic Cells / Logic Blocks: 56880
- IC Package Type: Other
- Pin Count: 1152
Amplifier and Comparator Chips - DAE-1 4-Channel DSP with SRS Labs algorithm Support and Integrated PWM Controller 128 pin LQFP -- D2-81435-LRSupplier: Intersil Corporation
Description: The D2Audio™ D2-814xx is a fully self-contained 4 channel digital amplifier controller System-On-Chip (SOC). The D2-814xx enables rapid system design for manufacturers of home theater receivers, multi-room distributed audio systems, and powered speakers. The D2-814xx contains a
- Device Type: Audio Amplifiers
Description: hours talk time, with 60 hours on standby for calling convenience - Over-the-head or over-the-ear wearing styles for personalized comfort - Digital signal processing (DSP) - PC wideband audio - Digital Encryption: 128-bit - Range: Up to 70 meters with Class 1 range - Headset Controls: Volume, mute
- Application: Telephone / Voice Communication
- Features: Bluetooth®
Supplier: Monroe Engineering
Description: /Aerospace,Industrial controls, DSP, FPGA, etc. The XPMC-6710elite grade Compute engine gives OEMs blazing Compute density to doleading edge pervasive computing. The PPC7448 includes 128-bit AltiVecvector execution unit as found in previous PC74xx devices, but with theenhanced support for out-of-order
- Product Type: Bus Interface / Adapter Module, Memory Module
- Technology: PCI, PCI-X
- PCI Data Bus: 64-bit
- Number of ports: 8
Supplier: Monroe Engineering
Description: , Defense/Aerospace, Industrial controls, DSP, FPGA, etc. The XPMC-6710 elite grade Compute engine gives OEMs blazing Compute density to do leading edge pervasive computing. The PPC7448 includes 128-bit AltiVec vector execution unit as found in previous PC74xx devices, but with the enhanced support
- Product Type: Controller / Processor
- Technology: VMEbus
- Operating System: Linux®, VxWorks®
Supplier: GE Digital Energy
Description: . Transparent and direct asynchronous communications offer real-time communication. No extra software or programming is needed to implement communications that use standard asynchronous protocols. The addition of the SD Adapter enables IP/Ethernet communications and AES 128-bit encryption to a system based
- Function: Transceiver
- Applications: Terrestrial RF/Microwave Systems
- Form Factor / Package: Stand Alone
- Operating Frequency: 3.30E8 to 9.60E8 Hz
Supplier: Visual Sound, Inc.
Description: ; 116 dB 96 kHz sample rate, 48 kHz optional THD+N < 0,005% 2 DSPs 150 MHz / 300 MIPS computing power 48 Bit double-precision algorithmsShow More
Supplier: Airbus Group
Description: Floating point DSP processor in MCM single package This module is based on 21020F DSP based core for embedded applications. It is an opened architecture that can be cascaded in large system thanks to 1355 high-speed links. It is a QFP mono-cavity Multi Chip Module, designed in a radiation
- Supply Voltage: 5 V
- Package Type: Other
- Clock Speed: 1.50E7 to 2.00E7 Hz
- MFLOPS: 30 to 40
Supplier: Visual Sound, Inc.
Description: ;, Crestron®) Connection to video conference system via 3-pin Phoenix terminal strip, mini jack (3.5 mm) or 3-pin XLR Selector switch for line/microphone level Phoenix terminal strip to pickup individual microphone signals e.g. for the use of external DSP devices Two antenna connectionsShow More
Supplier: ELMA Electronic Inc.
Description: e300 core running at 667 MHz with : L1 caches : 32KB Inst. and 32KB Data with parity MMU and FPU-DP capabilities DMA-channel controllers 128 or 256MB SDRAM-DDR with ECC 64 MB soldered Mirror Flash 128 MB soldered Nand Flash 32KB SPI EEPROM PPC Real Time clock and four 32 bit-timers Calendar
- Computer Backplane / Bus: PCI
- Processor / DSP type: PowerPC
- Clock Speed: 667 MHz
- Maximum Addressable Memory: 128 to 256 MB
Supplier: PESA Switching Systems, Inc.
Description: and asynchronous signals Digital signal processing (DSP) on all audio input and output signals - Gain adjustment - Delay - L/R Summing - L/R Swapping - AES pair breakaway
- Mounting: Panel / Chassis Mount
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Radicom Research, Inc.
RB540 Class I, Bluetooth Audio Module
x 0.10 ” (RB540-a), 1.00" x 1.33" x 0.25" (RB540HM-c). Serial Port Profile (SPP) support. A2DP, AVRCP, HFP / HSP support. 64MIPS Kalimba DSP co-processor. Up to 16Mbits flash memory on board (firmware dependent – 8Mbits typical). Secure communications with 128-bit encryption (optional). On-board antenna (RB540-a, RB540HM-a). On-board U.FL connector for external antenna (RB540HM-c). Support 802.11 wireless coexistence. -40 °C to +85 °C extended temperature operating. RoHS... (read more)
Browse Wireless Modems Datasheets for Radicom Research, Inc.
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EETimes.com | Electronics Industry News for EEs & Engineering Managers
Intel investment fuels Infineon's public offering Buyers benefit as DRAM prices head south Sony, TI collaborate to expand Memory Stick IC applications Chip technology implements RF direct conversion in standard CMOS Micromem aims ferromagnetic technology at 16-K memories Micronas combines RISC, DSP
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DSP chips and total processing load of FFT analysis
A 128 bits DSP chip architecture is given in Fig. 1 allowing a triadic instruction set for minimizing code expansion, with 32 bit opcode and 32 bit addresses.
Broadcom mediaDSP: A Platform for Building Programmable Multicore Video Processors
The BCM35421 mediaDSP has four RISC-based control engines, six task-oriented engines specifically for subtasks of the frame-rate conversion application, and 10 128 - bit DSP crunch engines.
DSP / 4
Two differential measurement units with a wide frequency range and 4 dual-phase demodulators, are matched with the unprecedented precision of a 128 - bit DSP engine.
BlinkSight’s Innovative Single-Chip Indoor GPS Solution for RTLS and WSN Applications
• Embedded software programmable ultra low power 128 bit vector DSP (<16 pJ / cycle .
The Equator MAP-CA/spl trade/ DSP: an end-to-end broadband signal processor/spl trade/ VLIW
The MAP-CA DSP ’s 128 - bit vector product instructions (illus- trated in Fig. 9) are well suited to computing the IDCT using (4)–(7) with 16-bit fixed-point numbers being used to represent the input and output values.
Fast switching burst mode receiver in a 24-channel 112Gb/s DP-QPSK WDM system with 240km transmission
We have previously demonstrated a physically realizable parallel DSP implementation for the blind recovery of 112Gb/s DP-QPSK bursts, where the DSP used a 128 bit wide bus that is suitable for realization on an ASIC with a 437.5MHz clock speed …
A reconfigurable computing board for high performance processing in space
Even if we assume that the operations are efficiently grouped together, so that the DSP processor performs 128 bit -wise operations per cycle, a 720 MHz DSP still performs only 92.2 Giga operations per second - about 73 times slower than the …
Applied Computational Intelligence in Engineering and Information Technology
Movidius DSP core (SVEs) – a 128 bit VLIW low power DSP with 8 paral- lel execution units (including an integer, scalar and vector SIMD floating point units – for both 16 and 32 bits floating point arithmetic).
Pairing-Based Cryptography – Pairing 2012
We prototype the design on a Xilinx Virtex-6 FPGA using 5237 slices and 64 DSPs ; a 128 - bit pairing is computed in 0.358 ms running at 230MHz.
High-Performance Energy-Efficient Microprocessor Design
StarCore SC 140 is also a VLIW DSP core with 128 - bit instructions.
Real-time HD video encoding on DSP
The width of the write buffer for C64x+ DSP is increased to 128 bits as compared to 64 bits on the C64x.
Algorithm All to know on Algorithme | Techniques of the Ingénieur
PSD ) at wide bus ( 128 bits and more) allowed the implantation of algorithms complex real time...
New approach to develop a system solution for an integrated multi-service system
Starting at 32bit for a minimal configuration of a single DSP, the maximal bus width is 128bit in case of 64 DSPs .
Bus-can All to know on Bus-can | Techniques of the Ingénieur
… 3, the cadencés bus widths at high are met... transparent flow to the user: all happen as if the bus was transmitted directly,... of the processors and the appearance of processors of signals processing ( PSD ) at wide bit bus ( 128 and more...
Software radio: The challenges for reconfigurable terminals
As an enti- rely new design, the latest architectures combine in a single core the advantages of a 16-bit instruction word for code compactness, a 32-bit instruction word for MCUperformance and a 128 - bit instruction word for high DSP performance.