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  • Interfacing 8051 MCUs with SPI Serial EEPROMs
    Serial Peripheral Interface (SPI) compatible serial bus. Bus signals required are a clock input (SCK) plus separate data in (SI) and data out (SO) lines. Access to the 25XXX serial EEPROM is controlled through a Chip Select (CS) input. Maximum clock frequencies range from 3 MHz to 20 MHz
  • Using C to Interface 8051 MCUs with SPI Serial EEPROMs
    and NXP's P89LPC952 8051-based MCU.CS) input. Maximum clockthrough a Chip Select ( The schematic shows the connections necessaryfrequencies range from 3 MHz to 20 MHz. between the MCU and the serial EEPROM as tested. Communication to the 25XXX serial EEPROM can be The software was written assuming
  • Using a Hardware Module to Interface 8051 MCUs with SPI Serial EEPROMs
    EEPROMs and NXP's P89LPC952 8051-based MCU.CS) input. Maximum clockthrough a Chip Select ( The schematic shows the connections necessaryfrequencies range from 3 MHz to 20 MHz. between the MCU and the serial EEPROM as tested. Communication to the 25XXX serial EEPROM can be The software was written
  • Learn About Plug and Play Smart Load Cells
    interface, and gives technical information such as sensitivity, bridge type, excitation, etc. This information is stored in an EEPROM chip attached to a Load Cell. By having this chip, the Load Cell can identify and describe itself to the network and or Smart Load Cell Meter, thereby easing automatic
  • Using a Hardware Module to Interface
    a. simple Serial Peripheral Interface (SPI) compatible. serial bus. Bus signals required are a clock input (SCK). plus separate data in (SI) and data out (SO) lines. Access to the 25XXX serial EEPROM is controlled. through a Chip Select (CS) input. Maximum clock. frequencies range from 3 MHz to 20 MHz
  • EETimes.com | Electronics Industry News for EEs & Engineering Managers
    Shellcase establishes subsidiary in United States Carmel chip set may reveal future of Intel's Rambus memory program Anadigics revenue up 61% in Q3, led by wireless IC sales Peregrine Semiconductor to detail new EEPROM architecture Infineon acquires Carmel DSP developer TSMC sales jump 75%; net
  • EETimes.com | Electronics Industry News for EEs & Engineering Managers
    of metropolitan networks could get turned on its head when an industry working group gathers Monday (Sept. 10) to hash out a draft standard for resilient packet rings, an emerging technology to improve bandwidth in the crowded metropolitan market. Commentary & analysis of week's chip news, Sept. 3-7 Altera joins
  • SMBus Communication for Small Form Factor Device Families
    configuration is shown in Figure 1. SMBus is a trademark of Intel; I2C is a trademark of Phillips Semiconductor. This application note describes the SMBus specification, how to configure and use the on-chip. SMBus interface, and SMBus debugging techniques. Code examples written in C provide the general

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