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Chapter 4 - Simplification and Minimization of Boolean Functions
Infinity Science Press
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Chapter 4 - Simplification and Minimization of Boolean Functions
 
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Chapter 4 - Simplification and Minimization of Boolean Functions
From Digital Principles & Logic Design

The complexity of digital logic gates to implement a Boolean function is directly related to the complexity of algebraic expression. Also, an increase in the number of variables results in an increase of complexity. Although the truth table representation of a Boolean function is unique, its algebraic expression may be of many different forms. Boolean functions may be simplified or minimized by algebraic means as described in Chapter 3. However, this minimization procedure is not unique because it lacks specific rules to predict the succeeding step in the manipulative process. The map method, first proposed by Veitch and slightly improvised by Karnaugh, provides a simple, straightforward procedure for the simplification of Boolean functions. The method is called Veitch diagram or Karnaugh map, which may be regarded either as a pictorial representation of a truth table or as an extension of the Venn diagram.

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Digital multimeters (or multi-meters) are used to measure electrical quantities such as voltage, current, resistance, frequency, temperature, capacitance, and time period measurements.
Microcontrollers (MCU) are complete computer systems on a chip. They combine an arithmetic logic unit (ALU), memory, timer/counters, serial port, input/output (I/O) ports and a clock oscillator.
Programmable logic devices (PLD) are designed with configurable logic and flip-flops linked together with programmable interconnect. PLDs provide specific functions, including device-to-device interfacing, data communication, signal processing, data display, timing and control operations, and almost every other function a system must perform.
Simple programmable logic device (SPLD) chips are the simplest, smallest and least expensive type of programmable logic device (PLD). They typically comprise 4 to 22 fully connected macro cells.
Complex programmable logic devices (CPLDs) are integrated circuits (ICs) or chips that application designers configure to implement digital hardware such as mobile phones. CPLDs can handle significantly larger designs than simple programmable logic devices (SPLDs), but provide less logic than field programmable gate arrays (FPGAs).
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Topics of Interest
The digital system consists of two types of circuits, namely (i) Combinational circuits and (ii) Sequential circuits A combinational circuit consists of logic gates, where outputs are at any instant... (Read More)
In the case of ROM-based design, we have seen that, since all the minterms are generated in a ROM, the realization of a set of Boolean functions is based on minterms canonical expressions. It is never... (Read More)
The implementation of Boolean functions using decoders was already discussed in Chapter 5. The same approach is applicable in using ROM, since ROM is the device that includes both a decoder and OR... (Read More)
Let us consider that the following functions are to be realized using a PAL device. F1 (A,B,C) = ( 1,2,4,5,7) F2 (A,B,C) = ( 0,1,3,5,7) Similar to designing with PLA, in the case of a PAL device... (Read More)
Access Time: Time between the memory receiving a new input address and the output data’s becoming available in a read operation. Active Load: A transistor that acts as a load for another transistor. (Read More)
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