TABLE OF CONTENTS In this chapter, the techniques used to lower the power dissipation for portable terminals in general and wireless portable terminals in particular are investigated. The last few years witnessed the widespread of portable equipment from cellular phones to multimedia portable terminals. However, these mobile equipment are constrained in computational capability due to battery limitations and size limitations [53].
Over the last 30 years battery capacity has increased by a factor of 2 to 4, while the computational power of digital IC s increased more than 4 orders of magnitude [56]. The energy density of the Ni Cd batteries used in portable terminals is about 20 Watt-Hour/Pound [57]. Battery capacity isn t expected to increase dramatically over the next few years. New battery technology such as Nickel-Metal-Hydride is expected to have a capacity of no more than 30 35 Watt-Hour/Pound.
With the increase in market demand for new capabilities and functionality in mobile equipment, new approaches are required to reduce the power dissipation and hence prevent the battery size from growing in tandem with computational complexity.
Until recently power consumption was not a high priority issue in the design of VLSI systems. Performance (speed) and cost (area) were the two metrics that governed the design of VLSI systems [58]. However, the need for longer battery life in future portable terminals has added power dissipation to the metrics that should be considered when designing a VLSI system.
Even though our main concern in this chapter is mobile applications, it should be noted that...
