Design of High-Speed Communication Circuits

2. Radio Receiver Architectures

2. Radio Receiver Architectures

In this section, we present an overview of radio receiver architectures in an approximate chronological sequence in terms of their evolution and implementation in highly integrated silicon processes. The narrative starts with the classical super-heterodyne architecture followed by its extension to image-reject architectures before moving on to the direct-conversion architecture; in each case, we discuss the advantages and disadvantages in terms of their performance and amenability to silicon integration. This leads naturally into modern radio architectures, almost all of which utilize direct-conversion or very-low intermediate frequency (VLIF) architectures.

A small fraction of modern consumer receivers is based on the sampling technique wherein the desired signal is directly sampled or sub-sampled either at RF or IF; such signals may either be directly digitized using a bandpass analog-to-digital converter (ADC) or filtered and down-converted using discrete-time analog decimation filters prior to digitization. Such receivers have become popular in applications such as radar, which are not constrained by cost, power and a compelling need for integration. In fully integrated form with applications to portable electronics, they suffer from a number of problems that have not been resolved. As a result, they are typically out-performed by traditional architectures. Nevertheless, sampled-data radios are being actively researched, and in some cases used in commercial products. In spite of the resurgent interest in such architectures, we will not describe them in detail herein owing to the tutorial nature of this paper.

2.1. The Super-Heterodyne Architecture

The classical super-heterodyne architecture (Fig. 1(a)) has been...

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