Design of High-Speed Communication Circuits

Several state-of-the-art wireless receiver architectures including the traditional superheterodyne, the image reject heterodyne, the direct-conversion, and the very-low IF have been presented in this paper along with case studies. In addition, traditional as well as emerging circuit topologies for receiver building blocks have been examined. These include the common-source and common-gate LNAs, passive, active, even-harmonic, and masking quadrature mixers, and series-injected and Colpitts quadrature VCOs. With the current aggressive scaling trends and the reduced power supply voltages, these developments will be crucial in helping to achieve an integrated solution with low power and high performance.