Digital Clocks for Synchronization and Communications
This text explains important phase-lock circuit design techniques, and how to select commercially available equipment for a variety of projects in the field.
TABLE OF CONTENTS Digital Clocks for Synchronization and Communications
Chapter 9: PLL LSI
9.1 PLL in Transmission Interfaces
One network may use many clocks at different frequencies. PLLs appear in clocks, components, and elements of the network. They synchronize the network and supply synchronized frequencies and timing to individual elements. While networks can still use conventional PLLs, the application of PLL LSIs at transmission interfaces has begun. They offer many benefits including low cost in the hyper-competitive telecommunications field. Since the number of transmission interfaces is large, LSIs used in the interfaces are essential for reducing the cost of the whole network, which stimulates development. The transmission interface can, except for the optical devices, be realized as a small number of LSIs if we use a PLL LSI. The clock generation and recovery functions (see Chapter 7) are parts of the transmission interface. LSIs aiming towards these functions are typical research goals, although the current devices are still immature. The configurations of the fully integrated clock recovery circuit and clock generation circuit are described in this chapter.
9.2 Basic Configuration of Transmission Clock Recovery Circuit
When a digital signal is transmitted to another place, it is necessary to minimize the waveform deterioration that occurs during transmission and then regenerate the original signal waveform. These functions are placed at the input of the receiver system. An example of the receiver circuit configuration is shown in Figure 9.1. The transmission information regeneration circuit accurately reconstructs the information even if transmitted over long distances. The receiving node must use a clock that is identical to the...
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