Digital Clocks for Synchronization and Communications

Internal clocks of synchronous systems often have different frequencies to the reference clock. It is necessary to convert the reference clock into new frequencies without losing accuracy. A PLL is suitable for this because it performs the conversion and synchronization. A function for freely synthesizing frequencies can be implemented by a mechanism that changes the PLL configuration. Such a circuit is an indispensable element of a wireless system. Frequency accuracy, clock purity, and switching speed are key design parameters in cellular phone networks. In a cable or fiber system, on the other hand, frequency switching is not so common. A frequency generation system provides an important measurement function for design and performance verification. These devices are called synthesizers.
The history of the PLL reflects that of other electronics with a steady move towards complete digitalization. The analog-digital PLL was the first type to be used in digital circuits. They are still found in many systems since they can be treated as if they were fully digital. The main goal of PLL design has been miniaturization. The phase comparator and the loop filter have been digitalized. The modern quartz crystal oscillator is so small that such a device for cellular phones occupies less than 1 cm 3. Ring-type oscillators have also been digitalized. Modern PLLs are being realized as single-chip ICs, as described in Chapter 9.
The second trend is performance improvement. The demand for...