Digital Clocks for Synchronization and Communications
This text explains important phase-lock circuit design techniques, and how to select commercially available equipment for a variety of projects in the field.
TABLE OF CONTENTS Digital Clocks for Synchronization and Communications
Chapter 12: Some DDS Applications
12.1 DDS Trends
The DDS concept is difficult in designs that require high spectral purity because of the unacceptable level of spurious components. This results from the basic DDS configuration and from noise, which is generated, for example, by layout defects. These phenomena are of a fundamental nature and are thus hard to eliminate. For an adequate suppression of spurious components it is better to increase the internal DDS frequency rather than the processing width. An optimization of the relationship between the reference and the output frequency is inferior too. Recent progress in LSI technologies has, however, enabled fast DACs, which are used in high-frequency DDS circuits. They replace analog systems and conventional synthesizers and generate pure signals. Arbitrary waveform generators, which mostly output the signal according to programmed data, and frequency converters, which are required to generate complicated frequency ratios, have been realized from the latest DDS. These generators utilize the DDS feature that enables a free and precise control of the output frequency and phase.
12.2 Synthesizer
Figure 12.1 illustrates a new synthesizer that can generate a single frequency with various waveforms, arbitrary waveforms from internal memory, and that provides several modulations. This synthesizer can generate sine and square waves up to 30.2 MHz with a frequency resolution of 1 ?Hz. The spurious level is below 50 dBc over this frequency range. The DDS part is composed of a 48-bit adder (implemented as an LSI), a wave conversion part, whose input is the 14-bit output of the...
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