Digital Integrated Circuit Design
Working from the fundamentals of transistor-level design and building up to system-level considerations, this text demonstrates how to design state-of-the-art high performance digital integrated circuits.
TABLE OF CONTENTS Digital Integrated Circuit Design
Chapter 7: Latches, Flip-flops, and Synchronous System Design
We have now seen a number of different ways to realize logic gates using CMOS technology. All of the logic gates described thus far have been acyclic logic gates. That is, they have no memory or clock signals; output changes in response to input changes occur almost immediately. In this chapter, certain types of digital memory circuits will be covered. These circuits are often called cyclic logic circuits. These include latches, flip-flops, registers, and memory storage cells. A latch consists of a single memory location with some access circuitry. A flip-flop in an IC typically consists of two cascaded latches and perhaps some additional input logic. A register usually consists of a larger number of special-purpose latches. An IC memory consists of one or more arrays of specialized latches, called memory storage cells, with additional circuitry to access individual cells. System-level issues when designing synchronous [1] digital circuits will be discussed. In addition, two examples of synchronous logic-circuit design will be presented.
7.1 CMOS Clocked Latches
STATIC CMOS DIGITAL LATCHES
A digital latch is the simplest digital storage element. The most common way to store a digital signal is to use two cross-coupled inverters, having positive feedback, as is shown in Fig. 7.1a and b. Two cross-coupled inverters have two stable states: inverter a has a "1" output and inverter b has a "0" output, or, alternatively, inverter a has a "0" output and inverter b has a "1" output. One of...
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