TABLE OF CONTENTS He who has great power should use it lightly.
Seneca
This chapter provides an overview of the power management capabilities and protocol associated with PCI Express. During this chapter the existing PCI power management model is discussed as a base for PCI Express power management. The chapter expands on this base to define the new power management capabilities of PCI Express such as Link State Power Management and Active State Power Management (ASPM). The chapter also discusses the impact of PCI Express power management on current software models as well as the general flow that new software must take to enable the new power management capabilities.
Prior to PCI power management, power management was platform unique and defined by the specific system hardware, the system BIOS, and the System Management Mode (SMM) code. This power management technique worked reasonably well for fixed configuration systems until the concept of the add-in card was defined. Several years after the standardization of general I/O through PCI adoption, it became apparent that a system-independent power management standard was needed to address PCI based add-in cards. In June of 1997 the PCI-SIG released the PCI Bus Power Management Interface Specification Revision 1.0 to standardize PCI-based system power management.
Though not specifically required to do so, each PCI and PCI Express device is capable of hosting multiple functions. The PCI Bus Power Management Specification Revision 1.1, which PCI Express is compatible with, defines four function-based power management states, D0...
