Introduction to PCI Express: A Hardware and Software Developer's Guide

We live in a moment of history where change is so speeded up that we begin to see the present only when it is already disappearing.
R. D. Laing
This chapter looks at the legacy of the Peripheral Component Interconnect commonly called PCI, identifying what PCI does well and where it has become inadequate. The chapter outlines the introduction of PCI and the evolution of the architecture up to the present, explaining the need for a new I/O architecture.
The concept of PCI was originally developed in the early 1990s by Intel Corporation as a general I/O architecture that could theoretically transfer four times more data than the fastest I/O buses at the time, as shown in Table 2.1. Intel developed the architecture to address the problem of data bottlenecks resulting from new graphics-based operating systems such as Microsoft Windows 3.1. Additionally, the bandwidth capacity of PCI was an ideal match for the new Intel Pentium brand of processors that Intel was preparing to market. PCI was viewed as the vehicle that would fully exploit the processing capabilities of the new brand of processors.
| I/O Bus | MHz | Bus Width (Bits) | Megabytes Per Second (MB/s) |
|---|---|---|---|
| Industry Standard Architecture (ISA) | 8.3 | 16 | 8.3 |
| Extended Industry Standard Architecture(EISA) | 8.3 | 32 | 33 |
| Peripheral Component Interconnect (PCI) | 33 | 32 | 132 |
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