TABLE OF CONTENTS Thus far, oscillator design has been considered assuming linear operation of the active device. Many aspects of oscillator performance are predicted by these linear design considerations. In this chapter the nonlinear aspects of the design are considered. This allows prediction of most remaining oscillator performance parameters.
Assuming that oscillation criteria is satisfied, an oscillator is formed by connecting the output of the resonator-amplifier cascade to the input. Oscillations then build up until the excess loop gain is lost because of limiting in the active device. Limiting occurs when the transistor is driven into saturation and/or cutoff during a portion of the waveform cycle. If the excess loop gain is small, the required limiting is slight, waveforms are nearly sinusoidal, and nearly-class-A operation conditions exist. The linear design considerations and parameters have the greatest validity in this situation. If the excess loop gain is large, and AGC or other form of external limiting is not applied, the active device may remain saturated or cut off over a significant portion of the waveform period. This results in class-C operation conditions. This is normally undesirable, except in the design of high-efficiency, high-output power oscillators.
For near-class-A operation, if limiting is due to cutoff, the oscillation amplitude is proportional to the emitter bias current. If limiting is due to saturation, the amplitude is proportional to the quiescent dc collector-emitter voltage [1]. These parameters may be established with nearly any desired degree of stability by the selection of...
