Serial ATA Storage Architecture and Applications

Chapter 7: Physical Layer

Overview

The Physical Layer, or simply Phy, is the portion of the interface that is responsible for generating an actual electrical signal and transmitting-it across the interconnect that is, printed circuit board traces, a connector pair, and a cable assembly and for deciphering the received electrical signals. As Figure 7.1 indicates, the Phy is the lowest layer in the architecture.


Figure 7.1: The Phy in the Serial ATA Layered Architecture

In Serial ATA, the Phy also provides several additional services and capabilities to include signaling of the special hard reset signal, detection of host plugging or unplugging, transition from the interface power management states, and speed negotiation, in addition to generation and reception deciphering of the electrical signals used for the highspeed serial signaling.

Low-Voltage Differential Signaling

The signaling scheme used in Serial ATA is called low-voltage differential signaling. As the name implies, the signaling voltages themselves are fairly low, and the signaling scheme used is differential. In a differential signaling scheme, the signal is not conveyed as the voltage on a conductor (relative to a common ground) but is instead conveyed as the difference between the voltages on two different adjacent conductors. To generate this voltage difference between the adjacent conductors, each of the two conductors effectively acts as the inverse of the other.While the voltage on one conductor is high, voltage on the other is low, and vise versa. The signaling voltages are explained in the following section.

The disadvantage of a differential signaling scheme is that each...

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