1.2 FEW PINS = MASSIVE MULTIPLEXING

As shown in Figure 1.3, the 4-bit Intel 4004 microprocessor was packaged in a 14-pin dual-inline package (DIP). Consequently, this microprocessor s 4-bit bus not only multiplexed access to the various components in the system, it also had to multiplex the bus-access addresses with the data on the same four wires. It took three clock cycles to pass a 12-bit address out over the bus and two or four more clock cycles to read back an 8- or 16-bit instruction. All instructions came from ROM in a 4004-based system. RAM accesses were even slower because they required one instruction to pass out the target address and then a second instruction to read data from or write data to the selected location. With a maximum operating frequency of 740kHz and long, multi-cycle bus operations, the Intel 4004 microprocessor was far too slow to take on many system control tasks and the electronics design community largely ignored the world s first microprocessor.

Figure 1.3: The Intel 4004 microprocessor, introduced in 1971, was packaged in a 16-pin package that severely limited the processor s I/O bandwidth and restricted its market accordingly. Photo Courtesy of Stephen A. Emery Jr., www.ChipScapes.com.

The world s second commercial microprocessor, Intel s 8008 introduced in April, 1972, was not much better than the 4004 processor in terms of bus bandwidth. The 8008 microprocessor s 8-bit bus needed two cycles to pass a 14-bit address and one to three cycles to accept an 8- to 24-bit instruction.