Designing SOCs with Configured Cores: Unleashing the Tensilica Xtensa and Diamond Cores

1.5: THE CONSEQUENCES OF PERFORMANCE IN THE MACRO WORLD

1.5 THE CONSEQUENCES OF PERFORMANCE IN THE MACRO WORLD

Faster clock rates coupled with more and wider buses do indeed increase processor performance, but at a price. Increasing the clock rate extracts a penalty in terms of power dissipation, as shown in Figure 1.8. In fact, power dissipation rises roughly with the square of the clock-rate increase, so microprocessor power dissipation and energy density have been rising exponentially for three decades. Unfortunately, the result is that the fastest packaged processors today are bumping into the heat-dissipation limits of their packaging and cooling systems. Since their introduction in 1971, cooling design for packaged microprocessors progressed from no special cooling to:

  • careful system design to exploit convection cooling,

  • active air cooling without heat sinks,

  • active air cooling with aluminum and then copper heat sinks,

  • larger heat sinks,

  • even larger heat sinks,

  • dedicated fans directly attached to the processor s heat sink,

  • heat pipes,

  • heat sinks incorporating active liquid cooling subsystems.


Figure 1.8: Packaged microprocessor power density has risen exponentially for decades. (Source: F. Pollack, keynote speech, New microarchitecture challenges in the coming generations of CMOS process technologies, MICRO-32, Haifa, Israel, 1999.)

Each step up in heat capacity has increased the cost of cooling, increased the size of required power supplies and product enclosures, increased cooling noise (for fans), and decreased system reliability due to hotter chips and active cooling systems that have their own reliability issues.

SOCs cannot employ the same sort of...

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