Designing SOCs with Configured Cores: Unleashing the Tensilica Xtensa and Diamond Cores

1.9: SYSTEM-DESIGN EVOLUTION

1.9 SYSTEM-DESIGN EVOLUTION

Semiconductor advances achieved through the relentless application of Moore s law have significantly influenced the evolution of system design since microprocessors became ubiquitous in the 1980s. Figure 1.10 shows how minimum microprocessor feature size has tracked Moore s law since the introduction of the Intel 4004, which used 10-micron (10,000-nm) lithography. The figure also incorporates ITRS 2005 (International Technology Roadmap for Semiconductor) projections to the year 2020, when the minimum feature size is expected to be an incredibly tiny 14nm. Each reduction in feature size produces a corresponding increase in the number of transistors that will fit on a chip. Presently, Intel s dual-core Itanium-2 microprocessor holds the record for the largest number of transistors on a microprocessor chip at 1.72 billion. Most of the Itanium-2 s on-chip transistors are devoted to memory. In the 21st century, SOCs routinely contain tens of millions to several hundred million transistors.


Figure 1.10: The relentless decrease in feature size that has slavishly followed Moore s law for decades fuels rapid complexity increases in SOC designs.

A series of system-level snapshots in 5-year intervals illustrates how system design has changed, and how it also has clung to the past. Figure 1.11 shows a typical electronic system, circa 1985. At this point in the evolution of system design, microprocessors have been available for nearly 15 years and microprocessor-based system design is now the rule rather than the exception. Packaged microprocessor ICs are combined with standard RAM, ROM, and peripheral ICs and this collection of off-the-shelf LSI chips...

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