Processor Design: System-On-Chip Computing for ASICs and FPGAs

Processor Design System-On-Chip Computing for ASICs and FPGAs

Edited by

Jari Nurmi
Tampere University of Technology
Finland

Springer

A C.I.P. Catalogue record for this book is available from the Library of Congress.

ISBN 9781402055294 (HB)

ISBN 978-1-4020-5530-0 (e-book)

Published by Springer,
P.O. Box 17, 3300 AA Dordrecht, The Netherlands.

www.springer.com

All Rights Reserved

2007 Springer

No part of this work may be reproduced, stored in a retrieval system, or transmitted in any form or by any means, electronic, mechanical, photocopying, microfilming, recording or otherwise, without written permission from the Publisher, with the exception of any material supplied specifically for the purpose of being entered and executed on a computer system, for exclusive use by the purchaser of the work.

Dedication

To Pirjo, Lauri, Eero, and Santeri

List of Contributing Authors

Anant Agarwal
Massachusetts Institute of Technology
Computer Science and Artificial
Intelligence Laboratory
32 Vassar Street
Cambridge, MA 02139
USA

Tapani Ahonen
Tampere University of Technology
Institute of Digital and Computer Systems
P.O. Box 553
FI-33101 Tampere
Finland

Saman Amarasinghe
Massachusetts Institute of Technology
Computer Science and Artificial Intelligence Laboratory
32 Vassar Street
Cambridge, MA 02139
USA

James Ball
Altera, Inc.
110 Cooper St., Suite 201
Santa Cruz, CA 95060
USA

Ian Bratt
Massachusetts Institute of Technology
Computer Science and Artificial Intelligence Laboratory
32 Vassar Street
Cambridge, MA 02139
USA

Claudio Brunelli
Tampere University of Technology
Institute of Digital and Computer Systems
P.O. Box 553
FI-33101 Tampere
Finland

Fabio Campi
STMicroelectronics
FTM/CCDS/Configurable Logics
Viale C. Pepoli 3/2
40123 Bologna
Italy

Matt Frank
Massachusetts Institute of Technology

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