TABLE OF CONTENTS Microprocessors with abbreviated address spaces are very much like shoes that are too small you can end up with blisters or abrasions when trying to shoehorn code and data into their small-memory spaces. If you re like one of Cinderella s sisters, you might even lose a toe or two. And like Cinderella s sister, the result is also not very pretty!
Bell and Strecker [46] express the problem of cramped address space this way: There is only one mistake that can be made in computer design that is difficult to recover from not having enough address bits for memory addressing and memory management.
Yet in spite of the difficult recovery, processor designers have made this same design mistake time and time again. This species of design error refuses to die. Hennessy and Patterson ([188], p. 501) provides a long but not exhaustive list of similarly afflicted processor designs: DEC s PDP-8, PDP-10, and PDP-11; Intel s 8080, 8086, and 80186; Motorola s 6800; MOS Technology s 6502; Zilog s Z80; and Cray s Cray-1 and Cray X-MP.
The reason that this particular design mistake is so critical is that in addition to determining the maximum addressable memory space for machines with fixed-length instructions, the bit width of a processor s address determines the minimum width of everything inside (and outside) of the processor having anything to do with the address including the size of the address word (and hence the instruction-word size), the size of branch offsets, the...
