Introduction

Addressing the conflicting requirements of network-enabled embedded systems has become, in recent years, an important challenge for designers. Balancing the scale between the need for short time-to-market and the requirement for cost-efficient development cycles of new products is a demanding goal that has traditionally been approached by using general purpose processors (GPPs). However, general purpose microprocessors are no longer an appealing alternative for networking hardware due to their lack of optimized execution units for network processing. Using general purpose processors all networking functionality must be implemented in software. This in turn leads to very high CPU clock frequency requirements. General purpose processors that operate in a suitable frequency range are often too expensive, consume too much power or occupy physically too much space in the target system with all their required external circuitry. Also, many general purpose processor features, like floating point arithmetic units (FPUs), can usually not be taken advantage of in networking applications.

The increasing demands for functionality and performance of the current networking applications require the use of dedicated hardware circuits to boost the performance of the system. Consequently, extremely complicated application specific integrated circuits (ASICs) started to be developed. Being a hardware-based solution, they can provide higher performance, and lower power consumption and blueprint area than a general purpose processor implementation. The drawback is that the ASIC design process is demanding...