Processor Design: System-On-Chip Computing for ASICs and FPGAs

Chapter 16: Asynchronous and Self-Timed Processor Design

Jim Garside and Steve Furber

The University of Manchester, UK

The great majority of microprocessors are clocked; that is, their internal operations are controlled and timed by an external periodic timing reference known as a clock signal. Clocks are convenient, simplify design, and are the foundation upon which most design automation tools are built. However, clocks are not all good news. They cause a circuit to generate excessive electromagnetic interference, to dissipate excessive power, and they force all circuit functions to operate at the same rate however unnatural that may be for any particular function. The challenge of designing a microprocessor that operates without a central clock has appealed to some designers for many years, and the results of their research have now made fully clockless designs not only feasible but also commercially available, albeit still as a minority interest. In this chapter we survey some of the developments in asynchronous processors and speculate as to where these might lead in the future.

Motivation for Asynchronous Design

Asynchronous circuits are a Bad Idea; all electronics students are taught this early in their courses. This is because the synchronous model removes one of the more unpleasant unknowns from the design process, simplifying debugging and allowing the designer to concentrate on the logical correctness of the system. Asynchronous inputs, such as interrupts, should be synchronised as soon as possible to confine timing problems to tiny areas of the device.

So why would anyone want to make something as complex as a microprocessor...

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