SystemVerilog for Verification: A Guide to Learning the Testbench Language Features

6.5: Solution Probabilities

6.5 Solution Probabilities

Whenever you deal with random values, you need to understand the probability of the outcome. SystemVerilog does not guarantee the exact solution found by the random constraint solver, but you can influence the distribution. Any time you work with random numbers, you have to look at thousands or millions of values to average out the noise. Changing the tool version or random seed can cause different results. Some simulators, such as Synopsys VCS, have multiple solvers to allow you to trade memory usage vs. performance.

6.5.1 Unconstrained

Start with two variables with no constraints.

Example 6-17: Class Unconstrained
class Unconstrained;  rand bit x;          // 0 or 1  rand bit [1:0] y;    // 0, 1, 2, or 3endclass

There are eight possible solutions. Because there are no constraints, each has the same probability. You have to run thousands of randomizations to see the actual results approach the listed probabilities. [9]

Table 6-2: Solutions for Unconstrained class

Solution

x

y

Probability

A

0

0

1/8

B

0

1

1/8

C

0

2

1/8

D

0

3

1/8

E

1

0

1/8

F

1

1

1/8

G

1

2

1/8

H

1

3

1/8

6.5.2 Implication

In Example 6-18, the value of y depends on the value of x. This is indicated with the implication operator in the following constraint. This example and the rest in this section also behave in the way...

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