Overview

The reason for the growing interest in networks on chips (NoCs) can be explained by looking at the evolution of integrated circuit technology and at the ever-increasing requirements on electronic systems. The integrated microprocessor has been a landmark in the evolution of computing technology. Whereas it took monstrous efforts to be completed, it appears now as a simple object to us. Indeed, the microprocessor involved the connection of a computational engine to a layered memory system, and this was achieved using busses. In the last decade, the frontiers of integrated circuit design opened widely. On one side, complex application-specific integrated circuits (ASICs) were designed to address-specific applications, for example mobile telephony. These systems required multiprocessing over heterogeneous functional units, thus requiring efficient on-chip communication. On another side, multiprocessing platforms were devel-oped to address high-performance computation, such as image rendering. Examples are Sony's emotion engine [25] and IBM's cell chip [26], where on-chip communication efficiency is key to the overall system performance.

At the same time, the shrinking of processing technology in the deep sub-micron (DSM) domain exacerbated the unbalance between gate delays and wire delays on chip. Accurate physical design became the bottleneck for design closure, a word in jargon to indicate the ability to conclude success-fully a tape out. Thus, the on-chip interconnection is now the dominant factor in determining performance. Architecting the interconnect level at a higher abstraction level is a key factor for system design.

We have to understand the introduction of...