Networks on Chips: Technology and Tools

Network interfaces (NIs) are usually denoted as the glue logic necessary to adapt communicating cores to the on-chip network. Historically, embedded system processors have been natively designed with bus-specific interfaces [3 9]. As a consequence, hardware sub-modules of communication architectures have been directly exposed to core interfaces. The request-grant signaling between AMBA Advanced Microcontroller Bus Architecture) AHB Advanced High-performance Bus) master interfaces and the bus arbiter is an example thereof, and causes the arbiter design to be instance specific, thus not reusable without modifications across a number of different hardware platforms.
As the level of system integration in Systems on Chip (SoCs) began to rise, system designers faced the need to reuse pre-designed and pre-verified computation units across different platforms and with different communication architectures. Therefore, the need for effective plug-and-play design styles pushed the development of standard interface sockets, allowing to decouple the development of computational units from that of communication architectures [10, 11]. The Open Core Protocol (OCP [12]) was devised as an effective means of simplifying the integration task through the standardization of the core interface protocol. It also paves the way for more cost-effective system implementations, since it can be customtailored based on the complexity and on the communication requirements of the connected cores. AMBA AXI ( Advanced eXtensible Interface) introduced a similar paradigm shift in the AMBA family of communication protocol specifications: in fact, it defines a point-to-point protocol between a master and a slave interface with advanced communication semantics.
The common...