Networks on Chips: Technology and Tools

The main goal of the network and transport layers is to support the end-to-end communication between the modules at the specified quality of service (QoS) using a power-and resource-efficient sharing of the interconnect resources. This seemingly simple goal forces the designer to address all classical (and some new) network layer issues in the context of an individual chip design.
In order to define the end-to-end QoS, we need to define the on-chip communication requirements in terms of the module-to-module traffic types, rates, statistical behavior, and predictability. For each such end-to-end flow we also need to define the service it receives such as loss and delay. We also need to define the interrelation between these flows, such as priorities, and actions that should be taken when communication resources are scarce. Finally, we need to decide on the appropriate network architecture that supports the above QoS requirements. For this the following network on chip (NoC) characteristics must be defined: switching technique, NoC topology, addressing and routing scheme, and end-to-end congestion and flow control schemes.
First, the appropriate data switching mechanism (e.g., circuit switching, packet switching, etc.) needs to be selected for the multiplexing of multiple flows from different sources and different requirements in a single network. Then, the appropriate network topology needs to be selected and optimized to physically connect the different modules (including basic graph topology, links and router speeds, and specific layout issues). Addressing and routing schemes need to be devised in order to allow circuit...