TABLE OF CONTENTS Networks on chip (NoCs) are designed using principles that were investigated for multiprocessor computers as well as for local and wide area networks. Networks are characterized by architectures and protocols. The former embody the structural relations among the constituents of the network, while the latter specify the ways in which the network operates under various conditions. In this chapter we review the principles of network architecture, starting from a general taxonomy and revisit of the most commonly used topologies. Next, we will describe some novel architectures that have been proposed specifically for on-chip realizations. Finally, we will consider the impact of the physical substrate limitations and evaluate the merits of classic and novel architectures for NoCs.
The network architecture specifies the topology and physical organization of the interconnection network. The physical organization on chip and the proximity among nodes have a strong impact on the effectiveness of the architectures, as the signal propagation delay is often higher than, or comparable to, the processors' cycle time. A network architecture operates according to a set of protocols, which principally determine the switching, routing and control flow.
The choice of an architecture and protocol is usually done to meet some general goals, which include, but are not limited to, performance (latency and throughput), energy consumption, reliability, scalability and implementation cost. Note that energy consumption is an important metric for on-chip applications, while it is less relevant for other networks. Implementation cost relates to resource usage and, in on-chip networks,...
